The reversible and ``adiabatic'' transfer of charge in digital circuits has recently been a subject of interest in the low-power electronics community, but no one has yet created a complete, purely reversible CPU using this technology. Fundamental physical scaling laws imply that a fully-reversible processing element would permit unboundedly greater efficiency at some tasks, by several different metrics, than can be achieved with any possible irreversible computer. In this paper we describe the design of Flattop, a simple fully-adiabatic chip, now in fabrication, which can serve as a general-purpose parallel processor when tiled in large arrays. Flattop implements the Billiard Ball Cellular Automaton, a univeral and reversible model of computation. Flattop is implemented in a standard silicon 0.5 µm CMOS process using the Split-Level Charge Recovery Logic (SCRL) circuit family developed at our lab. Calculations indicate that our circuit can operate with about 2000 times the energy efficiency of an equivalent chip based on standard circuit techniques. Although Flattop is itself not a very practical architecture for performing arbitrary computations, it is an important proof-of-concept, demonstrating that universal reversible computers can actually be built using current technology.