The current PISA spec implies that some instructions are illegal. For example, if the destination register and first source register of an ADD are not the same, or if the destination and first source of an AND are the same, then the instruction is illegal. In the case of the AND, executing the instruction would not be reversible, and in the case of the ADD, although adding both of the two source registers into the distinct destination register is logically possible to do reversibly, it might require more complexity in the datapath than is supported.
Also, if some opcodes are unused, they would be considered illegal instructions as well.
However, rather than declaring all these instructions illegal, one could specify that they are perfectly legal but behave as NO-OPs. Such a provision, if followed consistently for all cases where the result of executing the instruction would otherwise be undefined or irreversible, would permit a guarantee of reversibility even if the machine attempts to execute arbitrary words of data. This seems a good safety feature, especially in light of the merged instruction/data memory change discussed elsewhere, which permits programs running on the Pendulum to actually generate new machine code to execute (e.g., a compiler).
If the instruction and data memories were kept separate, then the issue would be somewhat moot because the guarantee of reversibility could be provided at the compiler level rather than at the hardware level, by designing the compiler to never emit an illegal instruction. But since this separation precludes having a real operating system, we suggest the NO-OP behavior instead.
Aside from this issue of how to handle mismatched source/destination registers, all of the non-expanding arithmetic/logical instructions ADD, ADDI, NEG, RL, RLV, RR, RRV, XOR, and XORI are left untouched from the original PISA spec in this proposal.